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  cd4011a, cd4012a, cd4023a typ s cos/mos nand gates features: ? quie.cent current .pecified to 15 v quad 2 input - cd4011a dual 4 input - cd4012a triple 3 input - cd4023a ? maximum input leakage of 1 p.a at 15 v (full package-temperature range) the rca-cd4011a, cd4012a, and cd- 4023a nand gates provide the system designer with direct implementation of the nand function and supplement the existing family of cos/mas gates_ ? 1-v noise margin (full package-temperature range) these types are supplied in 14-lead her- metic dual-in-line ceramic packages (0 and f suffixes), 14-lead dual-in-line plastic packages (e suffix), 14-lead ceramic flat packages (k suffix), and in chip form (h suffix). recommended operating conditions for maximum reliability, nominal operatinll condition. should be selacted 10 that opera- tion i. alway. within the following range.: char8cterfltlc min. max. unitt supply voltage range (over full package 3 12 temperature range) maximum ratings, abso/utfl-maximum va/utls: storagetemperature range (tugl ........................... -65 to +150 o c operatingtemperature range (tal package types d. f. h ....................?............ -55 to +125 c package type e ..............?....................... -40 to +85 0 c dc supply-voltage range. ivdd' (voltages referenced to vss terminal). .. , ............. . ......... -0.5 to +15 v power dissipation per package (pol: for ta" -40 to +60 o c (package type e i ................... ...?. 500 mw for t a" +60 to +85 0 c (package type e i ...... derate linearly it 12 mw/oc to 200 mw for t a" -55 to +100 o c (package types d. fl ...................... 500 mw for t a" +100 to +125 0 c (package types d. fi .. derate linearly it 12 mw/oc to 200 mw device dissipation per output transistor for t a" full packagetemperature range (all package typesi ....... 100 mw input voltage range. all inputs ............... " ...... -0.5 to vdd +0.5 v lead temperature (during soldering). at distance 1/16 1/32 inch (1.59 0.79 mml from case for 10 s max .............. +265 0 c i"ut .ou ?? '.,i-. v fig. 2 - minimum & mufmum vol. t,.",., ch.r.ctll,i,tlc .. fig. 3 - typic" wii. tl'llmfer chllr.ctll,l,tlcl "' ii function of tiimptlrbtuf'll . ? -, input ,-2 .n",ti .iim'uti ,-4iji1'ut, otou in"'ti to fig. 4 - typical multi pia input $witchinll tnffe, characr,,,iftics fo, cd4012a. i..ut vol" tvl' fig. 5 - typicill cu'f'iint & vol. t",,"r chllrllctllri,tic,. cd4011a j.~ iles-24?s' cd4012a cd4023ah fi,l. 1 - function.' dillll''''''' ~ 2 02 yoo oates in 01 sa al.l inputs are protected bt cos/moll protection netwoiik ,2(1-2211'''' ouin - to - source \/ol ts ivds 1 fig. 6 - typical n-channel drain characteristics. 456 ______________________________________________________________________ _
cd4011a, cd4012a, cd4023a typ s static electrical characteristics condition limits it indlcltlld temperetum (oc) a. .... ri:jtic d,f,hpebflll' e pet.", units vo vin vdd -&6 (v) (v) (v) ouiescent d,evice - - 6 0.06 current, i l mix. - - 10 0.1 - - 16 2 output voltlge: - 0.5 6 l wlevel vol - 0,10 10 high level, - 0,5 6 voh - 0,10 10 noise immunity: 3.6 - 6 inputs low, vnl 7.2 - 10 inputs high, 1.4 - 5 vnh 2.8 - 10 noise margin: 4.5 - 5 inputs low, vnml 9 - 10 inputs high, 0.5 - 5 vnmh 1 - 10 output drive current: n-channel (sink) ion min. 0.5 - 5 0.31 c04011a c04023a 0.5 - 10 0.62 c04012a 0.5 - 5 0.15 0.5 - 10 0.31 p-channel (source), 4.5 - 6 0.31 idpmin. all types 9.5 - 10 0.75 input leak. any current, input 15 iil,iih fig. 10 - minimum p-chljllnbi drllin chllrllctllri.tic ?. +2& +126 -40 +2& +86 typ. 0.001 0.001 0.02 0.5 0.6 0.25 0.6 0.5 1.2 limit typ. limit 0.06 3 0.6 0.006 0.6 16 0.1 6 6 0.006 6 30 p.a 2 40 50 0.5 50 500 o typ.; 0.05 max. o typ.; 0.05 max. v 4.95 min.; 5 typ. 9.95 min.; 10 typ. 1.5 min.; 2.25 typ. 3 min.; 4.5 typ. v 1.5 min.; 2.25 typ.; 3 min.; 4.5 typ. 1 min. 1 min. v 1 min. 1 min. 0.25 0.175 0.145 0.5 0.12 0.095 0.5 0.35 0.3 0.6 0.25 0.2 0.12 0.085 0.072 0.25 0.06 0.05 ma 0.25 0.175 0.155 0.6 0.13 0.105 0.25 0.175 0.145 0.5 0.12 0.095 0.6 0.4 0.35 1.2 0.3 -0.24 10- 5 typ.; 1 max. p.a load ca'acitancf eel i - 'i' nca.ln ?? fig. 11 - typicbllow-ta-high ibvel propagbtion dblsy time vi. c l . oii .... to_ \ioi,tag( i"o,,-v ... ~ ? 10 viii \ ,v.,. .......... _, ot ... qlti '''"''1 oaoumded [iioil'ag _011' nwcutuii it.' 'iii"c "_ tliil!coimtclit.tallv_iof voi'-o.j .. '''c fig. 1 - typiclil p-chljllnlll drain chllr?:tllriltlcl. fig. 8 - minimum n-chllnnlll drbln chbfllctllri.tic. -cd40t ta & cd4023a. fig. 9 - typiclil n-channlll drbin chbfllctllri.ticl. load cap.titanci eel -., 'its-l,n5 fig. 12 - typicbi highta-iow 111",,1 proplll1l1tion dllilly timll vi. cl - cd40t ta. & cd4023a. 457
cd4011a, cd4012a, cd4023a typ s dynamic electrical characteristics at ta'" 25c, cl -15 pf,lnput t" t,-2o nt, rl -200 ksl test conditions characte r istics propagation delay time: lowtohigh level, tplh hightolow level, tphl cd401 la and cd4023a cd4012a transition time: lowto-high level, ttlh hightolow level, tthl cd4011 a and cd4023a cd4012a input capacitance, ci amiint t[lip[aaturt ctal ? 2'''<: ty"cal t?,mp[ratutt[ cl)[rrk:ient "'" all val.lj[s 01 ydo -0 ,""e 40501010110 load capacitance' cc l '- p' tzcs." .. vdd (v) 5 10 5 10 5 10 5 10 5 10 5 10 any input limits d,f,h e pack., packljf/lj units typ. mix. typ. mix. 50 75 50 100 ns 25 40 25 50 50 75 50 100 ns 25 40 25 50 100 150 100 200 ns 50 75 50 100 75 100 75 125 ns 40 60 40 75 75 125 75 150 ns 50 75 50 100 250 375 250 500 ns 125 200 125 250 5 - 5 - pf load (apac,tance etl.' -,r fig. 15 - typical hightolow lall8l transition timb 1/& cl - c04011a & c04023a. fig. 16 - typical hightolow lall8l transition tima i/s. cl - c04012a. ,02 10' load capacitance (cl't:'pf cl~opf --- ii i o vss ,nputs vss tn,'uo_ "'[1ft t!lipifftatum ct a ' -25c typtcal t(iiip1ft"turr coe'''ci!ht 'or au yaluu 0' "00' 0 .... ie load capacitance t c l 1- p' fig. 13 - typical highro-low lal/al propagation dalay rima lis. c l - c04012a. fig. 14 - typicllllow-to-h/gh tranl/tion rima if$. cl' i; j~'?:" _u'::' ".,~ .. , if '0 .re'.' ??? , fig .. 17 - minimum propllf/lltion .'q tima 1/'. vol> it,ig. '8 - typical dissipation characfbrisrics. fig. 19 - quiescent device current test circuit. fig. 20 - noise,im"!unity test circuit. fig. 21 - input leakage current test circuit. 458 ______________________________________________________________ __


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